Payam Heydari received his B.S. and M.S. degrees (Honors) in Electrical Engineering from Sharif University of Technology in 1992 and 1995, respectively. He received his Ph.D. degree from the University of Southern California in 2001. He is currently an Associate Professor of Electrical Engineering and the EECS Associate Chair for Graduate Affairs at the University of California, Irvine.  

During the summer of 1997, he was with Bell-labs, Lucent Technologies where he worked on noise analysis in high-speed CMOS integrated circuits. He worked at IBM T. J. Watson Research Center on gradient-based optimization and sensitivity analysis of custom ICs during the summer of 1998.  

Dr. Heydari is the recipient of the 2007 IEEE Circuits and Systems Society Guillemin-Cauer Award, the 2005 IEEE Circuits and Systems Society Darlington Award, the 2005 National Science Foundation (NSF) CAREER Award, the 2005 Henry Samueli School of Engineering Teaching Excellence Award, the Best Paper Award at the 2000 IEEE Int'l Conference on Computer Design (ICCD), and the 2001 Technical Excellence Award from the Association of Professors and Scholars of Iranian Heritage (APSIH). He was recognized as the 2004 Outstanding Faculty in the EECS Department of the University of California, Irvine. His research on novel low-power multi-purpose multi-antenna RF front-ends received the Low-Power Design Contest Award at the 2008 IEEE Int'l Symposium on Low-Power Electronics and Design (ISLPED).

Dr. Heydari serves as the Associate Editor of IEEE Trans. on Circuits and Systems - I, and the Guest Editor of IEEE Journal of Solid-State Circuits. He currently serves on the Technical Program Committees of Custom Integrated Circuits Conference (CICC), ISLPED, and Int'l Symposium on Quality Electronic Design (ISQED). He was the Local Arrangement Chair of the 2004-2005 ISLPED, and the Student Design Contest Judge for the 2003 DAC/ISSCC Design Contest Award. He served on the Technical Program Committees of IEEE Design and Test in Europe (DATE) and International Symposium on Physical Design (ISPD). He is the director of the Nanoscale Communication IC (NCIC) Lab.

His research interests include design of ulta-high frequency analog and RF ICs, and high frequency on-chip interconnect design for high-speed ICs. He has published papers in premier conferences on integrated circuit design including ISSCC, CICC, RFIC Symposium, DAC, ICCAD. Results of the research in the NCIC Lab have appeared in more than 60 peer-reviewed journal and conference papers.

He is a Senior Member of the IEEE.