EECS 270C Course Materials

Winter 2013

In-Class Presentations:

Presentation slides in PowerPoint or pdf format:

Introduction (Week 1)	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
PLL theory & design (Week 2)	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
CDR theory & design (Week 3)	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
High-speed CMOS design, part 1 (Week 4)	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
High-speed CMOS design, part 2 (Week 5)	Recorded lecture		Original PowerPoint slides	Slides in pdf format
VCO Design	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
VCO phase noise analysis	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
Serializers/Deserializers/Electro-optical interfaces	Recorded lecture (part 1)	Recorded lecture (part 2)	Original PowerPoint slides	Slides in pdf format
Equalization / Compensation	Recorded lecture		Original PowerPoint slides	Slides in pdf format

Software:

You should have access to either HSPICE or SPECTRE in order to complete the homework assignments and the final project. These software packages, along with the Cadence design tools, are available to students with EECS accounts.

You can apply for an EECS account if you already have a UCInetID by going to:

http://newport.eecs.uci.edu/account.py

If you get an error message then you probably already have an EECS account. In this case you should contact DCS (dcs@uci.edu) to obtain your account access.

Links for running circuit simulation:

Running HSPICE/WaveView

Running Cadence

Converting HSPICE model format to SPECTRE

Some useful web sites:

Here's a good reference for learning about fiber-optic cable:

http://www.arcelect.com/Telebyte_Fiber_frame_page.htm

Here are some web sites where you can look up technical terms related to broadband communications:

http://www.webopedia.com

http://www.whatis.com

Reference Books & Articles:

Here are some books relevant to the course that are recommended; they are all available from Barnes and Nobel textbooks online:

Books on Fiber/SONET

Understanding Fiber Optics (Hecht)
Understanding Sonet/Sdh and ATM: Communications Networks for the Next Millennium (Kartalopoulos)
Sonet (Goralski)
Understanding SONET/SDH: Standards and Applications 1st ed (Chow)
Ethernet: The Definitive Guide (Spurgeon)
High Speed Circuits for Lightwave Communications (Wang)

Books on PLLs

Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design (Razavi)

Phase-Locked Loop Circuit Design (Wolaver)

Phaselock Techniques-2nd ed. (Gardner)

There’s also a pretty good treatment of PLL’s in the last chapter of this book:

Analog Integrated Circuit Design (Martin & Johns)

Articles on CDRs

Original paper describing the Hogge (linear/full-rate) CDR:
C. Hogge, “A self-correcting clock recovery circuit,” IEEE Journal of Lightwave Technology, vol. LT-3, pp. 1312-1314, Dec. 1985.

Pottbacker CDR (binary/full-rate):
A. Pottbacker & U. Langmann, “A Si bipolar phase and frequency detector IC for clock extraction up to 8 Gb/s,” IEEE Journal of Solid-State Circuits, vol. 27, pp. 1747-1751, Dec. 1992.

Rau CDR (binary/half-rate):
M. Rau et al., “Clock/data recovery PLL using half-frequency clock,” IEEE Journal of Solid-State Circuits, vol. 32, pp. 1156-1159, July 1997.

Savoj CDR (linear/half-rate):
J. Savoj & B. Razavi, “A 10Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector,” IEEE Journal of Solid-State Circuits, vol. 36, pp. 761-768, May 2001.

Savoj CDR (binary/half-rate):
J. Savoj & B. Razavi, “A 10Gb/s CMOS clock and data recovery circuit with a half-rate binary phase detector,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 13-21, Jan. 2003.

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