Implementation of ubiquitous processor SoC
Integrates 32bit RISC, VLIW DSP, and H/W Accelerators
FFT Processor (H/W Accelerator)
Digital signal processor for ubiquitous Platform (VLIW DSP)
Wireless LAN 802.11.b BB processor design and interface
Cooperate with UNIVE, Inc., CA, USA
Figure 1. uT Processor Block Diagram.
Figure 2. Layout.
