Xiaobin Li

Ph.D. in Electrical and Computer Engineering
Department of Electrical Engineering and Computer Science
University of California, Irvine

Contact

Email:

xiaobinl@ece.uci.edu

Mailing address:
Department of Electrical Engineering and Computer Science
University of California
Irvine, CA 92697

Research

I had been working with PArallel System and Computer Architecture Lab. (PASCAL) under the direction of Professor Jean-Luc Gaudiot
during my Ph.D. journey. But I am still actively researching the following topics in computer architecture fields:

1. Tolerating radiation-induced transient faults on modern microprocessors
2. Microprocessors power and thermal management
3. Microprocessor functional validation

Publications and Submissions

1. Tolerating Radiation-Induced Transient Faults in Modern Processors (Full Paper)
   Xiaobin Li and Jean-Luc Gaudiot
   International Journal of Parallel Programming (IJPP), Vol. 28, Issue 2, 2010
2. Simultaneous Multi-Threading Microarchitecture
   Chen Liu, Xiaobin Li, Shaoshan Liu, and Jean-Luc Gaudiot
   in Handbook of Research on Salarable Computing Technologies, IGI Global, ISBN 978-1-60566-661-7 (2010)
3. Design Trade-Offs and Deadlock Prevention in Transient Fault-Tolerant SMT Processors (Abstract) (Full paper) (Presentation)
   Xiaobin Li and Jean-Luc Gaudiot
   12th IEEE International Symposium on Pacific Rim Dependable Computing, Riverside, California, December 18-20, 2006
4. Tolerating Radiation-Induced Transient Faults in Modern Processors (Abstract)
   Ph.D. Dissertation submitted to University of California, Irvine, August, 2005
5. A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking (Abstract) (Full paper) (Presentation)
   Xiaobin Li and Jean-Luc Gaudiot
   9th Asia-Pacific Computer Systems Architecture Conference, Beijing, China, September 07-09, 2004
   Also appeared: Lecture Notes in Computer Science, Vol.3189, pp. 554-567, 2004 Springer-Verlag Berlin Heidelberg, 2004
6. A Formal Architecture for Open Systems (PDF)
   Xiaobin Li and Walt Scacchi
   Institute of Software Research, University of California, Irvine, December, 2001
   
7. Others available upon request.

Software

1. A Simultaneous Multi-Threading (SMT) Processor Performance Simulator: supporting multi-stage thread scheduling policies

Presentations

1. Tolerating Radiation-Induced Transient Faults on Modern Processors (PDF)
   Ph.D. Qualifying Exam, September, 2003
2. Speculative Multi-Threading on Chip Multi-Processor (PDF)
   Ph.D. Preliminary Exam, Spring2002
3. Itanium Processor Line Efforts (PDF)
   PASCAL Group Meeting, January, 2003
4. Tolerating Faults on Modern Processors (Poster)
   UC Irvine, School of Engineering Research Review, February, 2003

Favorite Links

1. Collected bookmarks
2. Computer architecture journal lists