Advanced Configuration & Power Interface (ACPI)
Microprocessor ISA and Microarchitecture
— Will the future be more divergent?
There are architecture divisions between CISC and RISC; there are superscalar, VLIW, and dataflow microarchitectures.
Moreover, there are enterprise, desktop/laptop, and embedded market segmentations.
Therefore (?), the following is not well-organized.
- x86 Architecture
— Things are changing, however, "object code created for processors released as early as 1978 still executes on the latest processors in the IA-32 architecture family."
- Intel
- IA-32 Intel architecture (IA-32 Intel Architecture software developer's manuals)
- Extended Memory 64 technology
- Matrix Math Extension (MMX) ® technology and Streaming SIMD Extensions (SSEx)
- Hyper-Threading technology
- Multi-core and many-core technology
- Machine check architecture
- Virtualization technology
- VT-x architecture
- VT-i architecture (for the Intel Itanium architecture)
- Power-aware computing: Enhanced Speedstep technology
- Safer computing
- LaGrande technology
- XD (eXecute Disable), a .k.a. NX (No eXecute)
- Active Management technology
- AMD
- Pacifica technology
- Hyper-Transport ™ technology ( HyperTransport Consortium)
- Transmeta
- VIA (Cyrix)
- RISC
— Can the CISC versus RISC debate now be settled?
- MIPS
- IBM
- Power 5/6 (Power.org)
- Cell processors
- Sun Microsystems
- Compaq
- HP
- VLIW
- Embedded