SOC DESC/MODELING
EECS 222A, Course Code: 18415
Quarter: Fall Quarter 2009

Course Description

EECS 222A: System-on-Chip Description and Modeling (3)
Computational models for System-on-Chip (SoC). System-level specification and description languages and execution semantics. Concepts, requirements, examples. SoC modeling at different levels of abstraction. Modeling of IP (intellectual property), design constraints, test benches. Simulation semantics and algorithms. Co-simulation methodology.

Course Objectives and Outcomes

• Course Objective:

  For students to learn concepts in modeling of System-on-Chip (SoC) designs at different abstraction levels using system-level description languages (SLDL).

• Course Outcomes:

  • Students are able to model SoC designs at different levels of abstraction.
  • Students are able to describe SoC design models in a SLDL.
  • Students are able to simulate, test and debug SoC design models.

Course Resources

• Text books:
  

  A. Gerstlauer, R. Doemer, J. Peng, D. Gajski: "System Design: A Practical Guide with SpecC", Kluwer Academic Publishers, Boston, June 2001. ISBN 0-7923-7387-1 ("Yellow book")
  Th. Groetker, St. Liao, G. Martin, St. Swan: "System Design with SystemC", Kluwer Academic Publishers, Boston, May 2002. ISBN 1-4020-7072-1 ("Black book")
  D. Gajski, J. Zhu, R. Doemer, A. Gerstlauer, S. Zhao: "SpecC: Specification Language and Methodology", Kluwer Academic Publishers, Boston, March 2000. ISBN 0-7923-7822-9 ("Green book")
  D. Gajski, S. Abdi, A. Gerstlauer, G. Schirner: "Embedded System Design: Modeling, Synthesis, Verification", Springer, July 2009. ISBN 978-1-4419-0503-1 ("Orange book")

• Course web site at
  http://eee.uci.edu/09f/18415/

Course Contents

	Topic	Reading
1	Introduction to SoC concepts, computational models	Yellow book, Chapter 1 through 1.4 Green book, Chapters 1 and 2 Orange book, Chapter 1
2	The SpecC system-level description language	Yellow book, Chapter 1.5 and 1.6 Green book, Chapter 3
3	SoC specification, modeling guidelines, validation	Yellow book, Chapter 2 through 2.2 Green book, Chapter 4 through 4.2.1
4	Execution and simulation semantics	Yellow book, Appendix A SpecC Language Reference Manual V2.0 Black book, Chapter 2.10
5	Abstraction levels, top-down design methodology	Yellow book, Chapter 2 Green book, Chapter 4 Orange book, Chapter 2
6	SoC architecture, processor modeling	Yellow book, Chapters 2.3 and 2.4 Green book, Chapter 4.2.2 Orange book, Chapter 3 through 3.4
7	SoC communication modeling	Yellow book, Chapters 2.5 and 2.6 Green book, Chapter 4.2.3 Orange book, Chapter 3.5 and 3.6
8	SoC hardware modeling, RTL	Yellow book, Chapters 2.7 and 2.8 Green book, Chapter 4.2.4 Orange book, Chapter 6
9	The SystemC system-level description language	Black book SystemC LRM 2.1
10	UML and other system-level description languages	UML 2.0 Superstructure



• Note that contents are tentative and may change!
• Please see the Schedule page for up-to-date scheduling information.

Course Policies

• Attendance Policy:

  Attendance and active participation is required.

• Assignments:

  Assignments are listed on the Assignments web page. They may be assigned on a weekly or bi-weekly basis. Submission instructions and due dates will be listed with each assignment.

• Exams:

  The course includes one final examination. Final examinations are administered during examination week at the time announced in the Schedule of Classes, Fall Quarter 2009.

• Grading Policy:

  The final grade for the course will be determined from the assignments and the final examination, as follows:
  • 50% Assignments
  • 50% Final examination

• Academic Honesty:

  The complete policy statement on academic honesty is published in the UCI Schedule of Classes, Fall Quarter 2009.
  Dishonesty will not be tolerated.