SYS/CHIP DESC/MODEL
EECS 298, Course Code: 16196
Quarter: Winter Quarter 2006

Course Description

EECS 298: System-on-Chip Description and Modeling (3)
Computational models for System-on-Chip (SoC). System-level specification and description languages and execution semantics. Concepts, requirements, examples. SoC modeling at different levels of abstraction (untimed, approximate time, cycle-accurate). Modeling of IP (intellectual property), design constraints, test benches. Simulation semantics and algorithms. Co-simulation methodology.

Course Objectives and Outcomes

• Course Objective:

  For students to learn concepts in modeling of System-on-Chip (SoC) designs at different abstraction levels using system-level description languages (SLDL).

• Course Outcomes:

  • Students are able to model SoC designs at different levels of abstraction.
  • Students are able to describe SoC design models in a SLDL.
  • Students are able to simulate, test and debug SoC design models.

Course Resources

• Text books:
  

  A. Gerstlauer, R. Doemer, J. Peng, D. Gajski: "System Design: A Practical Guide with SpecC", Kluwer Academic Publishers, Boston, June 2001. ISBN 0-7923-7387-1 ("Yellow book")
  Th. Groetker, St. Liao, G. Martin, St. Swan: "System Design with SystemC", Kluwer Academic Publishers, Boston, May 2002. ISBN 1-4020-7072-1 ("Black book")
  D. Gajski, J. Zhu, R. Doemer, A. Gerstlauer, S. Zhao: "SpecC: Specification Language and Methodology", Kluwer Academic Publishers, Boston, March 2000. ISBN 0-7923-7822-9 ("Green book")

• Course web site at
  http://eee.uci.edu/06w/16196/

Course Overview

Week	Topic	Lecture Notes	Reading
1	Introduction to SoC concepts, abstraction levels, computational models	Lecture 1	Yellow book, Chapter 1a Green book, Chapters 1, 2a
2	The SpecC system-level description language	Lecture 2	Yellow book, Chapter 1b Green book, Chapter 3
3	SoC specification, modeling guidelines, validation	Lecture 3	Yellow book, Chapter 2a Green book, Chapter 4a
4	Execution and simulation semantics	Lecture 4	SpecC LRM 2.0 Black book, Chapter 2.10
5	Top-down SoC design methodology	Lecture 5	Yellow book, Chapter 2 Green book, Chapter 4
6	SoC architecture and communication modeling	Lecture 6	Yellow book, Chapters 2b, 2c Green book, Chapters 4b, 4c
7	SoC cycle-accurate modeling, RTL	Lecture 7	Yellow book, Chapter 2d Green book, Chapter 4d
8	SoC project discussion, system validation	Lecture 8	n/a
9	The SystemC system-level description language	Lecture 9 SystemC Intro, Tutorial	Black book SystemC LRM 2.1
10	UML and other system-level description languages	Lecture 10 UML Overview	UML 2.0 Superstructure
Final	Final examination	n/a	n/a



• Note that contents are tentative and may change.

Course Policies

• Attendance Policy:

  Attendance and active participation is required.

• Assignments:

  Assignments are listed on the Assignments web page. They may be assigned on a weekly or bi-weekly basis. Submission instructions and due dates will be listed with each assignment.

• Exams:

  The course includes one final examination. Final examinations are administered during examination week at the time announced in the Schedule of Classes, Winter Quarter 2006.

• Grading Policy:

  The final grade for the course will be determined from the assignments and the final examination, as follows:
  • 50% Assignments
  • 50% Final examination

• Academic Honesty:

  The complete policy statement on academic honesty is published in the Schedule of Classes, Winter Quarter 2006.
  Dishonesty will not be tolerated.