SOC DESC/MODELING
EECS 222A, Course Code: 18430
Quarter: Fall Quarter 2007
EECS 222A: System-on-Chip Description and Modeling (3)
Computational models for System-on-Chip (SoC).
System-level specification and description languages and execution semantics.
Concepts, requirements, examples.
SoC modeling at different levels of abstraction.
Modeling of IP (intellectual property), design constraints, test benches.
Simulation semantics and algorithms.
Co-simulation methodology.
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Week | Topic | Lecture Notes | Reading |
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1 | Introduction to SoC concepts, abstraction levels, computational models | Lecture 1 | Yellow book, Chapter 1a Green book, Chapters 1, 2a |
2 | The SpecC system-level description language | Lecture 2 | Yellow book, Chapter 1b Green book, Chapter 3 |
3 | SoC specification, modeling guidelines, validation | Lecture 3 | Yellow book, Chapter 2a Green book, Chapter 4a |
4 | Execution and simulation semantics | Lecture 4 | SpecC LRM 2.0 Black book, Chapter 2.10 |
5 | Project discussion | Lecture 5 | n/a |
6 | Project discussion | Lecture 6 | n/a |
7 | SoC hardware modeling, RTL | Lecture 7 | Yellow book, Chapter 2d Green book, Chapter 4d |
8 | The SystemC system-level description language | Lecture 8 SystemC Intro, Tutorial |
Black book SystemC LRM 2.1 |
9 | UML and other system-level description languages | Lecture 9 UML Overview |
UML 2.0 Superstructure |
10 | SoC project discussion | Lecture 10 | n/a |
Final | Final examination | n/a | n/a |
The Electronic Educational Environment
University of California, Irvine |
http://eee.uci.edu/07f/18430/ |