EMBEDDED SYS MODLNG
EECS 222, Course Code: 17380
Quarter: Winter Quarter 2020


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Detailed Class Schedule

(last update: March 5, 2020)

Week Tuesday Thursday
1
January 7
Lecture 1: Introduction and setup
  • Course overview, administration, set up
  • Introduction to embedded system design
  • Levels of abstraction, top-down design flow
January 9
Lecture 2: Embedded system modeling
  • Models of computation
  • System-level description languages
  • Separation of concerns, plug-and-play
2
January 14
Lecture 3: SpecC system-level description language
  • SpecC language foundation, types
  • Structural and behavioral hierarchy
  • Exception handling
January 16
Lecture 4: SpecC system-level description language
  • Communication and synchronization
  • Timing and timing contraints
  • Library support, persistent annotation
3
January 21
Lecture 5: SpecC system-level description language
  • Communication and synchronization
  • Standard channel library
  • SpecC tools
January 23
Lecture 6: SystemC system-level description language
4
January 28
Lecture 7: SystemC system-level description language
  • SystemC from the ground up (Part 1)
  • Introduction and core concepts
  • SystemC modeling syntax
January 30
Lecture 8: SystemC system-level description language
  • SystemC from the ground up (Part 2)
  • SystemC ports, exports
  • SystemC bus modeling example
5
February 4
Lecture 9: SLDL execution semantics
  • Specification of SLDL semantics
  • Execution and simulation semantics
  • Discrete event simulation algorithm
February 6
Lecture 10: Embedded system specification
  • Test bench structure and communication
  • Structural test bench for application example
  • Control flow for stream processing
6
February 11
Lecture 11: Embedded system specification
  • Specification essentials
  • Specification modeling guidelines
  • Structural refinement of DUT
February 13
Lecture 12: Embedded system design exploration
  • Top-down design methodology
  • Specification modeling guidelines
  • System-on-Chip Environment (SCE) demo, part 1
7
February 18
Lecture 13: Embedded system design exploration
  • Specify-explore-refined design flow
  • Performance profiling and estimation
  • System-on-Chip Environment (SCE) demo, part 2
February 20
Lecture 14: Embedded system design flow
  • Performance estimation of the application example
  • Observing simulated time in SystemC, SpecC
  • Pipelining the design-under-test
8
February 25
Lecture 15: Embedded system design flow
  • Project discussion
  • Pipelining the design-under-test
  • Parallelization of bottle-neck blocks
February 27
Lecture 16: Embedded system design flow
  • Modeling of custom hardware components
  • Register Transfer Level (RTL) abstraction
  • RTL modeling in SpecC SLDL
9
March 3
Lecture 17: Communication abstractions
  • RTL modeling in SystemC SLDL
  • Bus-functional modeling (BFM)
  • Transaction-level modeling (TLM), 1.0 and 2.0
  • SystemC from the ground up (Part 3)
March 5
Lecture 18: Embedded system design flow
  • Project review
  • Throughput optimization of the application example
  • Software optimizations
  • Project wrap-up
10
March 10 Fri, February 21, 9:30am in ICS 209!
Lecture 19: Unified Modeling Language (UML)
  • Unified Modeling Language (UML)
  • Goals and overview
  • Example diagrams
March 12 Wed, February 26, 9:30am in ICS 209!
Lecture 20: Parallel Discrete Event Simulation
  • Discrete Event Simulation (DES)
  • Parallel Discrete Event Simulation (PDES)
  • Formal execution semantics, time-interval formalism
Final
March 19
Final Exam
8:00-10:00am

The Electronic Educational Environment
University of California, Irvine
http://newport.eecs.uci.edu/~doemer/w20_eecs222/