| Week |
Monday |
Wednesday |
|
1
|
|
April 3
|
|
Lecture 1: Introduction and setup
|
- Course overview, administration, set up
- Introduction to embedded system design
- Levels of abstraction, top-down design flow
|
|
|
April 5
|
|
Lecture 2: Embedded system modeling
|
- Models of computation
- System-level description languages
- Separation of concerns
|
|
|
2
|
|
April 10
|
|
Lecture 3: Lecture 3: SpecC system-level description language
|
- SpecC language foundation
- Types for hardware description
- Structural and behavioral hierarchy
|
|
|
April 12
|
|
Lecture 4: SpecC system-level description language
|
- State transitions
- Exception handling
- Communication and synchronization
|
|
|
3
|
|
April 17
|
|
Lecture 5: SpecC system-level description language
|
- Timing and timing contraints
- Library support, persistent annotation
- Standard channel library
|
|
|
April 19
|
|
Lecture 6: SystemC system-level description language
|
|
|
|
4
|
|
April 24
|
|
Lecture 7: SystemC system-level description language
|
- SystemC from the ground up
(Part 1)
- Introduction and core concepts
- SystemC modeling syntax
|
|
|
April 25
|
|
Lecture 8: SystemC system-level description language
|
- SystemC from the ground up
(Part 2)
- SystemC ports, exports
- SystemC bus modeling example
|
|
|
5
|
|
May 1
|
|
Lecture 9: SLDL execution semantics
|
- Specification of SLDL semantics
- Execution and simulation semantics
- Discrete event simulation algorithm
|
|
|
May 3
|
|
Lecture 10: Parallel Discrete Event Simulation
|
- Discrete Event Simulation (DES)
- Parallel Discrete Event Simulation (PDES)
- Formal execution semantics, time-interval formalism
|
|
|
6
|
|
May 8
|
|
Lecture 11: Embedded system specification
|
- Top-down system design flow
- Specification modeling guidelines
- Computer-aided model recoding
|
|
|
May 10
|
|
Lecture 12: Embedded system specification
|
- Structural hierarchy for application example
- Test bench structure and communication
- Control flow for stream processing
|
|
|
7
|
|
May 15
|
|
Lecture 13: Embedded system design flow
|
- Top-down design methodology
- Refinement-based design flow
- System-on-Chip Environment (SCE) demo, part 1
|
|
|
May 17
|
|
Lecture 14: Embedded system design flow
|
- Structural hierarchy for application example
- Design-under-test structure and communication
- Performance profiling
|
|
|
8
|
|
May 22
|
|
Lecture 15: Embedded system design flow
|
- Performance estimation of the application example
- Pipelining the design-under-test
- Parallelization of bottle-neck blocks
|
|
|
May 24
|
|
Lecture 16: Embedded system design flow
|
- Observing simulated time in SystemC, SpecC
- Top-down refinement-based design flow
- System-on-Chip Environment (SCE) demo, part 2
|
|
|
9
|
|
May 29
|
|
Holiday: Memorial Day
|
|
|
May 31
|
|
Lecture 17: Embedded system modeling
|
- Modeling of custom hardware components
- Register Transfer Level (RTL) abstraction
- RTL modeling in SpecC SLDL
|
|
|
10
|
|
June 5
|
|
Lecture 18: Cycle-accurate system models
|
- Hardware and software synthesis
- System-on-Chip Environment (SCE) demo, part 3
- Project discussion
|
|
|
June 7
|
|
Lecture 19: Unified Modeling Language (UML)
|
- Unified Modeling Language (UML) overview
- Invited talk by W. Mueller: UML 2.0
- Project discussion
|
|
|
Final
|
|
|
June 14
|
|
Final Exam
|
Technical Project Report
Due by 6:00pm
|
|